Tuesday, August 3, 2010
Assignment: case Study 10
You have been requested to write interrupt handler mechanism for a new OS. OS can allow for multiple handlers for same interrupt even though the processor may allow for just one. How would you model the interrupt hander mechanism to allow for multiple handlers for the interrupt? Don’t focus on efficiency, just think of multiple ways to achieve it.
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class IInterruptListener
ReplyDelete{
public:
virtual void HandleInterrupt( ) = 0;
}
class Interrupt
{
vector InterruptListenerLst;
vector::iterator itr;
void Notify()
{
for( itr = InterruptListenerLst.begin(); itr != InterruptListenerLst.end(); ++itr )
{
(*itr)->GetInterruptHandler(*this)->HandleInterrupt();
}
}
}
Original comment with some correction:
ReplyDeleteclass IInterruptListener
{
public:
virtual void HandleInterrupt( ) = 0;
}
class Interrupt
{
vector InterruptListenerLst;
vector::iterator itr;
void Notify()
{
for( itr = InterruptListenerLst.begin(); itr != InterruptListenerLst.end(); ++itr )
{
(*itr)->HandleInterrupt();
}
}
}
I agree with Pankaj, The best way to solve this problem is using observer pattern.
ReplyDeleteeven I go by Pankaj solution.
ReplyDeleteObserver pattern
ReplyDeleteWell, I think we need to have
ReplyDelete1) OS expose a common interface for interrupt handlers.
2) Each device registers their InterruptHandlers corresponding to the interrupts with OS.
3) OS maintains a queue where generated interrupts are available and OS goes through each interrupt. Since there could be many handlers for each interrupt, so OS maintains a chain of interrupt handlers for one type of interrupt. Each interrupt handler decides whether it handles the interrupt or not and passes on to the next handler if it doesn't. This continues until the chain ends.
Its more or less a chain of responsibility pattern.